1. Field of the Invention
The embodiments of the invention generally relate to synchronizing multiple incoming signals and, more particularly, to a circuit for synchronizing multiple incoming signals as well as to a design structure for such a circuit.
2. Description of the Related Art
Frequently, applications require simultaneous movement of multiple signals from a first clock domain to a different asynchronous second clock domain. That is, oftentimes applications require simultaneous launching of multiple signals by the first clock domain as well as simultaneous receipt of the multiple signals by the second clock domain. Unfortunately, the nature of flip/flop set-up and hold time variations between the clock domains can result in signals, which are intended to moved simultaneously between the first and second clock domains, actually arriving at different times in the second clock domain. Therefore, there is a need in the art for a circuit capable of synchronizing multiple input signals received by one clock domain from a different asynchronous clock domain, when simultaneous movement of the input signals between clock domains is intended.